Specifications
Unless otherwise stated, all specifications apply after 30 minutes of instrument warm-up. |
Important changes in the specification parameters are explicitly mentioned in the revision history of this document. |
General Specifications
Parameter | min | typ | max |
---|---|---|---|
storage temperature |
–25 °C |
- |
65 °C |
storage relative humidity (non-condensing) |
- |
- |
95% |
operating temperature |
5 °C |
- |
40 °C |
operating relative humidity (non-condensing) |
- |
- |
90% |
specification temperature |
18 °C |
- |
28 °C |
power consumption |
- |
- |
100 W |
operating environment |
IEC61010, indoor location, installation category II, pollution degree 2 |
||
operating altitude |
up to 2000 meters |
||
power supply AC line |
100-240 V (±10%), 50/60 Hz |
||
dimensions with handles and feet |
45.0 × 34.5 × 10.0 cm, 17.7 × 13.6 × 3.9 inch, 19 inch rack compatible |
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weight |
6.0 kg |
||
recommended calibration interval |
2 years |
Parameter | min | typ | max |
---|---|---|---|
damage threshold Trigger Out 1 and 2 |
–0.7 V |
– |
+4 V |
damage threshold Trigger In 1 and 2 |
–0.7 V |
– |
+4 V |
damage threshold Reference Clock Out (DC) |
-4 V |
– |
+4 V |
damage threshold Reference Clock In (AC, with DC offset 0 V) |
– |
– |
+13.5 dBm |
damage threshold Reference Clock In (DC) |
-4 V |
– |
+4 V |
DIO In / Out in default configuration 3.3 V CMOS/TTL |
-0.7 V |
– |
+4 V |
Parameter | Description |
---|---|
supported Windows operating systems |
Windows 10, 8.1, 7 on x86-64 |
supported macOS operating systems |
macOS 10.11+ on x86-64 and ARMv8 |
supported Linux distributions |
GNU/Linux (Ubuntu 14.04+, CentOS 7+, Debian 8+) on x86-64 and ARMv8 |
minimum host computer requirements |
Windows 7 64-bit Dual Core CPU 4 GB DRAM 1 Gbit/s Ethernet controller |
recommended host computer requirements |
Windows 10 or GNU/Linux or macOS Quad Core CPU (i7) or better 8 GB DRAM or better 1 Gbit/s Ethernet controller USB 3.0 connection |
supported processors |
x86-64 (Intel, AMD), ARMv8 (e.g., Raspberry Pi 4, Apple M1) |
Analog Interface Specifications
Parameter | Details | min | typ | max |
---|---|---|---|---|
trigger outputs |
- |
2 SMA on back panel |
||
trigger output impedance |
- |
50 Ω |
||
trigger output voltage range |
50 Ω impedance |
0 V |
- |
3.3 V |
reference clock output |
- |
SMA on back panel |
||
reference clock output amplitude |
100 MHz into 50 Ω |
1 Vpp |
||
reference clock output frequency |
- |
10 / 100 MHz |
Parameter | Details | min | typ | max |
---|---|---|---|---|
trigger inputs |
- |
2 SMA on back panel |
||
trigger input impedance |
- |
50 Ω |
||
trigger input voltage range |
50 Ω impedance |
0 V |
- |
3.3 V |
trigger input threshold |
- |
- |
0.5 V |
- |
reference clock input frequency |
- |
10 / 100 MHz |
||
reference clock input amplitude |
- |
0 dBm |
- |
+13 dBm |
Digital Interface Specifications
Parameter | Description |
---|---|
host computer connection |
USB 3.0, 1.6 Gbit/s |
1GbE, LAN / Ethernet, 1 Gbit/s |
|
DIO port |
4 x 8 bit, general purpose digital input/output port, 3.3 V TTL specification |
ZSync port |
Zurich Instruments proprietary interface for trigger and data communication with external peripherals, 1.2 Gbit/s, 2.4 V LVDS specification |
Number of ZSync ports |
18 |
ZSync communication latency |
<100 ns |
ZSync supported peripheral devices |
HDAWG, SHFSG, and SHFQA: direct data and trigger connection to PQSC via ZSync. UHFQA: indirect data and trigger connection to PQSC via DIO connection between UHFQA and HDAWG, and ZSync between HDAWG and UHFQA. Each UHFQA in a QCCS requires one HDAWG to establish a connection to PQSC. |
DIO Connector
The DIO port is a VHDCI 68 pin connector as introduced by the SPI-3 document of the SCSI-3 specification. It is a female connector that requires a 32 mm wide male connector. The DIO port features 32 bits that can be configured byte-wise as inputs or outputs.

Pin | Name | Description | Range specification |
---|---|---|---|
68 |
n/a |
no signal assigned |
3.3 V CMOS/TTL |
67 |
DOL |
DIO output latch, 50 MHz clock signal, the digital outputs are synchronized to the falling edge of this signal |
3.3 V CMOS |
66-59 |
DIO[31:24] |
digital input or output (set by user) |
output CMOS 3.3 V, input is CMOS/TTL |
58-51 |
DIO[23:16] |
digital input or output (set by user) |
output CMOS 3.3 V, input is CMOS/TTL |
50-43 |
DIO[15:8] |
digital input or output (set by user) |
output CMOS 3.3 V, input is CMOS/TTL |
42-35 |
DIO[7:0] |
digital input or output (set by user) |
output CMOS 3.3 V, input is CMOS/TTL |
34-1 |
GND |
digital ground |
- |